Solid state imaging devices typically include a photosensor such as a photodiode formed in or on a substrate, a color filter formed over the photosensitive device and a microlens array formed over the color filter. The photosensor may be a photodiode, a CMOS (complimentary metal oxide semiconductor) sensor or a charge-coupled device (CCD), for example. N+ type photosensors (NPS's) are commonly used. Between the photosensor and the color filter there is generally a relatively thick inter-metal dielectric (IMD) that accommodates multiple levels of metallization used as an interconnection medium in the peripheral circuits of the solid state imaging device.
It is clearly desirable to maximize the sensitivity of the imaging device, i.e., the amount of light that reaches the photosensors. One shortcoming of imaging devices is that the sensitivity of the photosensor is proportional to the fill factor, which is defined as the ratio of the area of the photosensor to that of the pixel area. The thick inter-metal dielectric makes it difficult to align the lens and photosensor and insure that the light, which passes through the lens, reaches the photosensor. The amount of light that is not directed to the photosensor increases with the increasing thickness of the IMD. Furthermore, the interconnect metal disposed within the IMD may reflect incident light further reducing the optical signal and therefore the sensitivity of the photosensor.
FIG. 1A shows an exemplary solid state imaging sensor device 20 and includes photosensors 22 formed in a substrate 24 according to the prior art. The imaging sensor device 20 also includes IMD layers 26 with several levels of metal interconnect lines 32. The metal lines 32 are located between the photosensors 22 leaving light pathways for light rays 28 to reach the photosensors 22. A passivation level 30 is located above the interconnection structure 34. The passivation level 30 may include a silicon nitride film and another dielectric layer, which may be formed by the chemical vapor deposition of a high density plasma, for example. The image sensor device also includes plain layer 35, color filter 36, microspacer 37, and upper-most micro-lenses 38 aligned over photosensors 22. Optional overcoat 39 covers upper-most micro-lenses 38 and may be formed of suitable materials such as acrylate, methacrylate, epoxy-acrylate, or polyimide, and may include a thickness of 0.3-3.0 μm, for example. Plain layer 35 may have a refractive index of 1.4-1.7, may be composed of acrylate, methacrylate, epoxy-acrylate, or polyimide, and may include a thickness of 0.3-3.0 μm, for example. Microspacer 37 may have a refractive index of 1.4-1.7, may be composed of acrylate, methacrylate, epoxy-acrylate, or polyimide, and include a thickness of 0.3-3.0 μm, for example. Color filter 36 may have a refractive index of 1.4-1.7, may be composed of acrylate, methacrylate or epoxy-acrylate, and indicates a thickness of 0.3-2.5 μm, in this example. It can be seen that the thickness 40 of interconnection structure 34 needed to accommodate the multiple layers of metal interconnects lines 32 positions the upper-most micro-lenses 38 distant from corresponding photosensors 22, potentially diminishing the amount of light 28 that reaches the photosensors 22.
FIG. 1B is an enlarged view of the interconnection structure 34 of FIG. 1A described above, showing more details. Copper is currently the metal of choice for metal lines 32. Using copper typically requires barrier layers. Also, when forming the metal lines 32 using a copper damascene or dual-damascene method, it is typically desirable to use barrier layers 42 for copper diffusion barrier. Also, it is now the preferred practice to use low-k dielectric materials for the IMD layers 26 and for the barrier layers 42 also present as an etch stop layer. As illustrated in FIG. 1B, typical barrier layers 42 are too thick, and part of the light (see e.g., the light ray 28 in FIG. 1B) is reflected by the barrier layers 42. And with the number of metallization lines 32 and levels increasing with the development of new chips (e.g., system-on-chip or SoC structures, logic-embedded or logic circuits on same chip as image sensor device), the ability of the light 28 to reach the photosensors 22 with sufficient energy is becoming incompatible with current designs for making image sensor devices. Furthermore, as the photosensors and micro-lenses continue to shrink to increase the number pixels per chip (for increased resolution for a given size chip), these problems become even more pronounced (because the photosensor areas 22 are shrinking also).
Hence, a need exists for an improved structure that increases the sensitivity of the imaging device by allowing more light to be received by the photosensors. Furthermore, there is a need for improved structures for image sensor devices that are compatible with thicker interconnection structures (more metallization levels) and compatible with shrinking pixel areas (greater number of pixels per square millimeter). Yet, it would be desirable to not depart too far from the current methods of manufacturing and current layout structures as well, for which the manufacturers already have much capital investment in tooling, intellectual property, design blocks, and employee training.